1-- 2-- Taken from rtl/riverlib/core/stacktrbuf.vhd of https://github.com/sergeykhbr/riscv_vhdl 3-- with modifications. 4-- 5----------------------------------------------------------------------------- 6--! @file 7--! @copyright Copyright 2017 GNSS Sensor Ltd. All right reserved. 8--! @author Sergey Khabarov - sergeykhbr@gmail.com 9--! @brief Stack trace buffer on hardware level. 10------------------------------------------------------------------------------ 11 12library ieee; 13use ieee.std_logic_1164.all; 14library commonlib; 15use commonlib.types_common.all; 16 17entity StackTraceBuffer0 is 18 generic ( 19 abits0 : integer := 5; 20 dbits0 : integer := 64 21 ); 22 port ( 23 i_clk0 : in std_logic; 24 i_raddr0 : in std_logic_vector(abits0-1 downto 0); 25 o_rdata0 : out std_logic_vector(dbits0-1 downto 0); 26 i_we0 : in std_logic; 27 i_waddr0 : in std_logic_vector(abits0-1 downto 0); 28 i_wdata0 : in std_logic_vector(dbits0-1 downto 0) 29 ); 30end; 31 32architecture arch_StackTraceBuffer0 of StackTraceBuffer0 is 33 34 type ram_type0 is array ((2**abits0)-1 downto 0) of std_logic_vector (dbits0-1 downto 0); 35 signal stackbuf0 : ram_type0; 36 signal raddr0 : std_logic_vector(abits0-1 downto 0); 37 38begin 39 40 -- registers: 41 process(i_clk0) begin 42 if rising_edge(i_clk0) then 43 if i_we0 = '1' then 44 stackbuf0(conv_integer(i_waddr0)) <= i_wdata0; 45 end if; 46 raddr0 <= i_raddr0; 47 end if; 48 end process; 49 50 o_rdata0 <= stackbuf0(conv_integer(raddr0)); 51 52end; 53