xref: /Universal-ctags/Units/parser-verilog.r/systemverilog-struct.d/input.sv (revision 31730736bc3e251d2b19154196de4fe409cd7cdc) 
1//
2// LRM 7. Aggregate data types
3//
4
5// 7.2 Structures
6class S;
7  struct { bit [7:0] opcode; bit [23:0] addr; }IR;  // anonymous structure
8                                                    // defines variable IR
9  function foo;
10    IR.opcode = 1;    // set field in IR.
11  endfunction
12  typedef struct {
13    bit [7:0] opcode;
14    bit [23:0] addr;
15  } instruction;      // named structure type
16  instruction IR1;    // define variable
17
18  // 7.2.1 Packed structures
19  struct packed signed {
20    int a;
21    shortint b;
22    byte c;
23    bit [7:0] d;
24  } pack1; // signed, 2-state
25
26  struct packed unsigned {
27    time a;
28    integer b;
29    logic [31:0] c;
30  } pack2; // unsigned, 4-state
31
32  typedef struct packed { // default unsigned
33    bit [3:0] GFC;
34    bit [7:0] VPI;
35    bit [11:0] VCI;
36    bit CLP;
37    bit [3:0] PT ;
38    bit [7:0] HEC;
39    bit [47:0] [7:0] Payload;
40    bit [2:0] filler;
41  } s_atmcell;
42
43  // 7.2.2 Assigning to structures
44  typedef struct {
45    int addr = 1 + constant;
46    int crc;
47    byte data [4] = '{4{1}};
48  } packet1;
49
50  packet1 pi = '{1,2,'{2,3,4,5}}; //suppresses the typedef initialization
51endclass
52
53// 7.3 Unions
54class U;
55  typedef union { int i; shortreal f; } num;  // named union type
56  num n;
57  n.f = 0.0;  // set n in floating point format
58
59  typedef struct {
60    bit isfloat;
61    union { int i; shortreal f; } n;  // anonymous union type
62  } tagged_st;                        // named structure
63
64  // 7.3.1 Packed unions
65  typedef union packed { // default unsigned
66    s_atmcell acell;
67    bit [423:0] bit_slice;
68    bit [52:0][7:0] byte_slice;
69  } u_atmcell;
70
71  u_atmcell u1;
72  byte b; bit [3:0] nib;
73  b = u1.bit_slice[415:408];    // same as b = u1.byte_slice[51];
74  nib = u1.bit_slice [423:420]; // same as nib = u1.acell.GFC;
75
76  // 7.3.2 Tagged unions
77  // FIXME: TBD
78endclass
79
80// orignal
81class O;
82  struct { bit [7:0] opcode; }IR;
83  struct packed signed { int a; } pack1;
84  struct packed unsigned { int a;} pack2;
85  union packed unsigned { logic [7:0] a; } union1;
86  struct packed signed { int a; } [3:0] pack3, pack4;
87
88  // complex enum
89  typedef logic user_t;
90  enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;
91  enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;
92  typedef enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum0_t ;
93  typedef enum logic unsigned{A,B,C}[1:0]enum1_t;
94
95  // complex struct
96  struct packed signed {
97    logic a,b ;
98    logic [15:0] [7:0] s0 , s1;
99    struct {
100      logic x, y; // not emitted
101    } [15:0] [7:0] struct0_s, struct1_s;
102    enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;
103    enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;
104    bit[7:0][1:0]d,e;
105  } [1:0] complex0_s, complex1_s;
106
107  // complex typedef of struct
108  typedef struct packed signed {
109    logic a,b ;
110    logic [15:0] [7:0] s0 , s1;
111    struct {
112      logic x, y; // not emitted
113    } [15:0] [7:0] struct0_s, struct1_s;
114    enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;
115    enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;
116    bit[7:0][1:0]d,e;
117  } [1:0] complex_t;
118endclass
119