xref: /Universal-ctags/Units/parser-verilog.r/systemverilog-struct.d/expected.tags (revision 31730736bc3e251d2b19154196de4fe409cd7cdc)
1S	input.sv	/^class S;$/;"	C
2IR	input.sv	/^  struct { bit [7:0] opcode; bit [23:0] addr; }IR;  \/\/ anonymous structure$/;"	S	class:S
3opcode	input.sv	/^  struct { bit [7:0] opcode; bit [23:0] addr; }IR;  \/\/ anonymous structure$/;"	w	struct:S.IR
4addr	input.sv	/^  struct { bit [7:0] opcode; bit [23:0] addr; }IR;  \/\/ anonymous structure$/;"	w	struct:S.IR
5foo	input.sv	/^  function foo;$/;"	f	class:S
6instruction	input.sv	/^  } instruction;      \/\/ named structure type$/;"	T	class:S
7opcode	input.sv	/^    bit [7:0] opcode;$/;"	w	typedef:S.instruction
8addr	input.sv	/^    bit [23:0] addr;$/;"	w	typedef:S.instruction
9IR1	input.sv	/^  instruction IR1;    \/\/ define variable$/;"	r	class:S
10pack1	input.sv	/^  } pack1; \/\/ signed, 2-state$/;"	S	class:S
11a	input.sv	/^    int a;$/;"	w	struct:S.pack1
12b	input.sv	/^    shortint b;$/;"	w	struct:S.pack1
13c	input.sv	/^    byte c;$/;"	w	struct:S.pack1
14d	input.sv	/^    bit [7:0] d;$/;"	w	struct:S.pack1
15pack2	input.sv	/^  } pack2; \/\/ unsigned, 4-state$/;"	S	class:S
16a	input.sv	/^    time a;$/;"	w	struct:S.pack2
17b	input.sv	/^    integer b;$/;"	w	struct:S.pack2
18c	input.sv	/^    logic [31:0] c;$/;"	w	struct:S.pack2
19s_atmcell	input.sv	/^  } s_atmcell;$/;"	T	class:S
20GFC	input.sv	/^    bit [3:0] GFC;$/;"	w	typedef:S.s_atmcell
21VPI	input.sv	/^    bit [7:0] VPI;$/;"	w	typedef:S.s_atmcell
22VCI	input.sv	/^    bit [11:0] VCI;$/;"	w	typedef:S.s_atmcell
23CLP	input.sv	/^    bit CLP;$/;"	w	typedef:S.s_atmcell
24PT	input.sv	/^    bit [3:0] PT ;$/;"	w	typedef:S.s_atmcell
25HEC	input.sv	/^    bit [7:0] HEC;$/;"	w	typedef:S.s_atmcell
26Payload	input.sv	/^    bit [47:0] [7:0] Payload;$/;"	w	typedef:S.s_atmcell
27filler	input.sv	/^    bit [2:0] filler;$/;"	w	typedef:S.s_atmcell
28packet1	input.sv	/^  } packet1;$/;"	T	class:S
29addr	input.sv	/^    int addr = 1 + constant;$/;"	w	typedef:S.packet1
30crc	input.sv	/^    int crc;$/;"	w	typedef:S.packet1
31data	input.sv	/^    byte data [4] = '{4{1}};$/;"	w	typedef:S.packet1
32pi	input.sv	/^  packet1 pi = '{1,2,'{2,3,4,5}}; \/\/suppresses the typedef initialization$/;"	r	class:S
33U	input.sv	/^class U;$/;"	C
34num	input.sv	/^  typedef union { int i; shortreal f; } num;  \/\/ named union type$/;"	T	class:U
35i	input.sv	/^  typedef union { int i; shortreal f; } num;  \/\/ named union type$/;"	w	typedef:U.num
36f	input.sv	/^  typedef union { int i; shortreal f; } num;  \/\/ named union type$/;"	w	typedef:U.num
37n	input.sv	/^  num n;$/;"	r	class:U
38tagged_st	input.sv	/^  } tagged_st;                        \/\/ named structure$/;"	T	class:U
39isfloat	input.sv	/^    bit isfloat;$/;"	w	typedef:U.tagged_st
40n	input.sv	/^    union { int i; shortreal f; } n;  \/\/ anonymous union type$/;"	w	typedef:U.tagged_st
41u_atmcell	input.sv	/^  } u_atmcell;$/;"	T	class:U
42acell	input.sv	/^    s_atmcell acell;$/;"	w	typedef:U.u_atmcell
43bit_slice	input.sv	/^    bit [423:0] bit_slice;$/;"	w	typedef:U.u_atmcell
44byte_slice	input.sv	/^    bit [52:0][7:0] byte_slice;$/;"	w	typedef:U.u_atmcell
45u1	input.sv	/^  u_atmcell u1;$/;"	r	class:U
46b	input.sv	/^  byte b; bit [3:0] nib;$/;"	r	class:U
47nib	input.sv	/^  byte b; bit [3:0] nib;$/;"	r	class:U
48O	input.sv	/^class O;$/;"	C
49IR	input.sv	/^  struct { bit [7:0] opcode; }IR;$/;"	S	class:O
50opcode	input.sv	/^  struct { bit [7:0] opcode; }IR;$/;"	w	struct:O.IR
51pack1	input.sv	/^  struct packed signed { int a; } pack1;$/;"	S	class:O
52a	input.sv	/^  struct packed signed { int a; } pack1;$/;"	w	struct:O.pack1
53pack2	input.sv	/^  struct packed unsigned { int a;} pack2;$/;"	S	class:O
54a	input.sv	/^  struct packed unsigned { int a;} pack2;$/;"	w	struct:O.pack2
55union1	input.sv	/^  union packed unsigned { logic [7:0] a; } union1;$/;"	S	class:O
56a	input.sv	/^  union packed unsigned { logic [7:0] a; } union1;$/;"	w	struct:O.union1
57pack3	input.sv	/^  struct packed signed { int a; } [3:0] pack3, pack4;$/;"	S	class:O
58a	input.sv	/^  struct packed signed { int a; } [3:0] pack3, pack4;$/;"	w	struct:O.pack3
59pack4	input.sv	/^  struct packed signed { int a; } [3:0] pack3, pack4;$/;"	S	class:O
60a	input.sv	/^  struct packed signed { int a; } [3:0] pack3, pack4;$/;"	w	struct:O.pack4
61user_t	input.sv	/^  typedef logic user_t;$/;"	T	class:O
62enum00_e	input.sv	/^  enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	E	class:O
63FOO	input.sv	/^  enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	c	enum:O.enum00_e
64BAR	input.sv	/^  enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	c	enum:O.enum00_e
65BAZ	input.sv	/^  enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	c	enum:O.enum00_e
66enum01_e	input.sv	/^  enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	E	class:O
67FOO	input.sv	/^  enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	c	enum:O.enum01_e
68BAR	input.sv	/^  enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	c	enum:O.enum01_e
69BAZ	input.sv	/^  enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	c	enum:O.enum01_e
70enum10_e	input.sv	/^  enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	E	class:O
71A	input.sv	/^  enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	c	enum:O.enum10_e
72B	input.sv	/^  enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	c	enum:O.enum10_e
73C	input.sv	/^  enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	c	enum:O.enum10_e
74enum11_e	input.sv	/^  enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	E	class:O
75A	input.sv	/^  enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	c	enum:O.enum11_e
76B	input.sv	/^  enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	c	enum:O.enum11_e
77C	input.sv	/^  enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	c	enum:O.enum11_e
78enum0_t	input.sv	/^  typedef enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum0_t ;$/;"	T	class:O
79FOO	input.sv	/^  typedef enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum0_t ;$/;"	c	typedef:O.enum0_t
80BAR	input.sv	/^  typedef enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum0_t ;$/;"	c	typedef:O.enum0_t
81BAZ	input.sv	/^  typedef enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum0_t ;$/;"	c	typedef:O.enum0_t
82enum1_t	input.sv	/^  typedef enum logic unsigned{A,B,C}[1:0]enum1_t;$/;"	T	class:O
83A	input.sv	/^  typedef enum logic unsigned{A,B,C}[1:0]enum1_t;$/;"	c	typedef:O.enum1_t
84B	input.sv	/^  typedef enum logic unsigned{A,B,C}[1:0]enum1_t;$/;"	c	typedef:O.enum1_t
85C	input.sv	/^  typedef enum logic unsigned{A,B,C}[1:0]enum1_t;$/;"	c	typedef:O.enum1_t
86complex0_s	input.sv	/^  } [1:0] complex0_s, complex1_s;$/;"	S	class:O
87a	input.sv	/^    logic a,b ;$/;"	w	struct:O.complex0_s
88b	input.sv	/^    logic a,b ;$/;"	w	struct:O.complex0_s
89s0	input.sv	/^    logic [15:0] [7:0] s0 , s1;$/;"	w	struct:O.complex0_s
90s1	input.sv	/^    logic [15:0] [7:0] s0 , s1;$/;"	w	struct:O.complex0_s
91struct0_s	input.sv	/^    } [15:0] [7:0] struct0_s, struct1_s;$/;"	w	struct:O.complex0_s
92struct1_s	input.sv	/^    } [15:0] [7:0] struct0_s, struct1_s;$/;"	w	struct:O.complex0_s
93enum00_e	input.sv	/^    enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	w	struct:O.complex0_s
94enum01_e	input.sv	/^    enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	w	struct:O.complex0_s
95enum10_e	input.sv	/^    enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	w	struct:O.complex0_s
96enum11_e	input.sv	/^    enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	w	struct:O.complex0_s
97d	input.sv	/^    bit[7:0][1:0]d,e;$/;"	w	struct:O.complex0_s
98e	input.sv	/^    bit[7:0][1:0]d,e;$/;"	w	struct:O.complex0_s
99complex1_s	input.sv	/^  } [1:0] complex0_s, complex1_s;$/;"	S	class:O
100a	input.sv	/^    logic a,b ;$/;"	w	struct:O.complex1_s
101b	input.sv	/^    logic a,b ;$/;"	w	struct:O.complex1_s
102s0	input.sv	/^    logic [15:0] [7:0] s0 , s1;$/;"	w	struct:O.complex1_s
103s1	input.sv	/^    logic [15:0] [7:0] s0 , s1;$/;"	w	struct:O.complex1_s
104struct0_s	input.sv	/^    } [15:0] [7:0] struct0_s, struct1_s;$/;"	w	struct:O.complex1_s
105struct1_s	input.sv	/^    } [15:0] [7:0] struct0_s, struct1_s;$/;"	w	struct:O.complex1_s
106enum00_e	input.sv	/^    enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	w	struct:O.complex1_s
107enum01_e	input.sv	/^    enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	w	struct:O.complex1_s
108enum10_e	input.sv	/^    enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	w	struct:O.complex1_s
109enum11_e	input.sv	/^    enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	w	struct:O.complex1_s
110d	input.sv	/^    bit[7:0][1:0]d,e;$/;"	w	struct:O.complex1_s
111e	input.sv	/^    bit[7:0][1:0]d,e;$/;"	w	struct:O.complex1_s
112complex_t	input.sv	/^  } [1:0] complex_t;$/;"	T	class:O
113a	input.sv	/^    logic a,b ;$/;"	w	typedef:O.complex_t
114b	input.sv	/^    logic a,b ;$/;"	w	typedef:O.complex_t
115s0	input.sv	/^    logic [15:0] [7:0] s0 , s1;$/;"	w	typedef:O.complex_t
116s1	input.sv	/^    logic [15:0] [7:0] s0 , s1;$/;"	w	typedef:O.complex_t
117struct0_s	input.sv	/^    } [15:0] [7:0] struct0_s, struct1_s;$/;"	w	typedef:O.complex_t
118struct1_s	input.sv	/^    } [15:0] [7:0] struct0_s, struct1_s;$/;"	w	typedef:O.complex_t
119enum00_e	input.sv	/^    enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	w	typedef:O.complex_t
120enum01_e	input.sv	/^    enum user_t [1:0] { FOO, BAR, BAZ } [3:0] enum00_e, enum01_e ;$/;"	w	typedef:O.complex_t
121enum10_e	input.sv	/^    enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	w	typedef:O.complex_t
122enum11_e	input.sv	/^    enum logic unsigned{A,B,C}[1:0]enum10_e,enum11_e;$/;"	w	typedef:O.complex_t
123d	input.sv	/^    bit[7:0][1:0]d,e;$/;"	w	typedef:O.complex_t
124e	input.sv	/^    bit[7:0][1:0]d,e;$/;"	w	typedef:O.complex_t
125