1test input.sv /^module test;$/;" m 2r input.sv /^ logic r;$/;" r module:test 3enable_a input.sv /^ event enable_a, enable_b;$/;" e module:test 4enable_b input.sv /^ event enable_a, enable_b;$/;" e module:test 5wa input.sv /^ logic wa, wb;$/;" r module:test 6wb input.sv /^ logic wa, wb;$/;" r module:test 7ta input.sv /^ time ta, tb;$/;" r module:test 8tb input.sv /^ time ta, tb;$/;" r module:test 9fork_1 input.sv /^ fork: fork_1$/;" b module:test 10block1 input.sv /^module block1 #(N_IF = 8) ($/;" m 11N_IF input.sv /^module block1 #(N_IF = 8) ($/;" c module:block1 parameter: 12clk input.sv /^ input logic clk, rst_n$/;" p module:block1 13rst_n input.sv /^ input logic clk, rst_n$/;" p module:block1 14b_g1 input.sv /^ generate for (genvar gi = 0; gi < N_IF; ++gi) begin : b_g1$/;" b module:block1 15a input.sv /^ logic a;$/;" r block:block1.b_g1 16var_b_g input.sv /^ logic var_b_g;$/;" r block:block1.b_g1 17b_g2 input.sv /^ for (genvar gi = 0; gi < N_IF; ++gi) begin : b_g2$/;" b module:block1 18b1 input.sv /^ always_comb begin:b1$/;" b block:block1.b_g2 19lb1 input.sv /^ logic lb1;$/;" r block:block1.b_g2.b1 20b2_1 input.sv /^ begin :b2_1$/;" b block:block1.b_g2.b1 21lb2 input.sv /^ logic lb2;$/;" r block:block1.b_g2.b1.b2_1 22b2_2 input.sv /^ begin :b2_2$/;" b block:block1.b_g2.b1 23lb2 input.sv /^ logic lb2;$/;" r block:block1.b_g2.b1.b2_2 24var_b_g input.sv /^ logic var_b_g;$/;" r block:block1.b_g2 25nested_block input.sv /^class nested_block;$/;" C 26func input.sv /^ function void func (input logic a, b);$/;" f class:nested_block 27a input.sv /^ function void func (input logic a, b);$/;" p function:nested_block.func 28b input.sv /^ function void func (input logic a, b);$/;" p function:nested_block.func 29outer_block input.sv /^ if (a) begin : outer_block$/;" b function:nested_block.func 30inner_block input.sv /^ if (b) begin : inner_block$/;" b block:nested_block.func.outer_block 31p input.sv /^ logic p; \/\/ class:nested_block$/;" r class:nested_block 32