SCARV_COP_INSN_SUCCESS # 36:localparam \SCARV_COP_INSN_SUCCESS = 3'b000; SCARV_COP_INSN_ABORT SCARV_COP_INSN_BAD_INS SCARV_COP_INSN_BAD_LAD SCARV_COP_INSN_BAD_SAD SCARV_COP_INSN_LD_ERR SCARV_COP_INSN_ST_ERR module SCARV_COP_ICLASS_PACKED_ARITH SCARV_COP_ICLASS_TWIDDLE SCARV_COP_ICLASS_LOADSTORE SCARV_COP_ICLASS_RANDOM SCARV_COP_ICLASS_MOVE SCARV_COP_ICLASS_MP SCARV_COP_ICLASS_BITWISE SCARV_COP_ICLASS_AES SCARV_COP_ICLASS_SHA3 SCARV_COP_SCLASS_SHA3_XY SCARV_COP_SCLASS_SHA3_X1 SCARV_COP_SCLASS_SHA3_X2 SCARV_COP_SCLASS_SHA3_X4 SCARV_COP_SCLASS_SHA3_YX SCARV_COP_SCLASS_SCATTER_B SCARV_COP_SCLASS_GATHER_B SCARV_COP_SCLASS_SCATTER_H SCARV_COP_SCLASS_GATHER_H SCARV_COP_SCLASS_ST_W SCARV_COP_SCLASS_LD_W SCARV_COP_SCLASS_ST_H SCARV_COP_SCLASS_LH_CR SCARV_COP_SCLASS_ST_B SCARV_COP_SCLASS_LB_CR FORMAL scarv_cop_cprs # 81:module scarv_cop_cprs ( g_clk g_clk_req g_resetn FORMAL `VTX_REGISTER_PORTS_OUT cprs_snoop crs1_ren crs1_addr crs1_rdata crs2_ren crs2_addr crs2_rdata crs3_ren crs3_addr crs3_rdata crd_wen crd_addr crd_wdata g_clk_req # 110:assign g_clk_req = crd_wen; crd_wen cprs FORMAL `VTX_REGISTER_PORTS_ASSIGNR cprs_snoop cprs crs1_rdata crs1_ren cprs crs1_addr crs2_rdata crs2_ren cprs crs2_addr crs3_rdata crs3_ren cprs crs3_addr i # 131:generate for (i = 0; i < 16; i = i + 1... i i i i gen_cprs g_clk g_resetn FORMAL cprs i $anyconst cprs i crd_wen crd_addr i crd_wen cprs i crd_wdata crd_wen cprs i crd_wdata crd_wen cprs i crd_wdata crd_wen cprs i crd_wdata